M4K™ ハードIPコア
The MIPS32® M4K® Hard IP Cores are technology-specificimplementations of the synthesizable 32-bit MIPS32 M4K core. Available implementationsinclude area optimized and performance optimized cores targeting SMIC 0.18µm.Chip developers or system OEMs who are building complex System-On-Chip (SoC)ASIC devices can significantly reduce design time, resources, and time to-marketby using M4K Hard IP Cores. The target markets for these cores include Microcontrollers,Automotive, Cell phones.
- Hard IP cores allow designers to significantly reduce design time, efficiently use resources, and quickly get to market
- Based on MIPS32 architecture for high performance
- Extensive clock gating reduces power consumption without reducing application performance
- Enhanced JTAG (EJTAG) debug with trace and fast download enable quick and easy debugging
- All major operating systems and compiler tool chains, and hundreds of third-party development tools, support the MIPS architecture
- Testability features include BIST and full scan
- Supports CorExtend capability which enables users to significantly enhance the value and competitive advantage of their SoC products
ハード・マイクロプロセッサ・コア
- 110 MHz in .18µm SMIC process – Area optimized
- 137 MHz in .18µm SMIC process - Speed optimized
32ビットMIPS32拡張アーキテクチャ
- 32-bit address and data paths
- Memory management unit with FMT
- Bit field instructions
- Vectored interrupts
メモリ管理ユニット
- Simple Fixed Mapping Translation mechanism
整数乗算/除算ユニット
- Fast MDU / Slow MDU options
- Maximum issue rate of one 32x16 multiply per clock
- Maximum issue rate of one 32x32 multiply every other clock
電力管理
- Minimum frequency: 0 MHz
- Power-down mode (triggered by WAIT instruction)
- Support for extensive use of local gated clocks
EJTAGデバッグ
- Support for single stepping
- Virtual instruction and data address breakpoints
開発サポート
- MIPS® SDE GNU based toolchain, MIPSsim™ Instruction Set Simulator, MIPS DSP Library. These tools are licensed for Windows, Linux and Solaris operating systems
- A complete offering of third-party development tools
| プロセス |
0.18µm SMIC – Speed Opt |
0.18µm SMIC - Area Opt |
| 動作周波数* |
138 MHz |
105 MHz |
| コアサイズ |
0.65 sq. mm |
0.38 sq. mm |
*Frequency measured under worst case conditions (SS process corner, Vdd nom- 10%, Tj=125 oC) and with perfect input clock